000 01013nam a22003257a 4500
003 CHAP
005 20220329140522.0
008 971013s1980 r 00010 d
010 _a53237
011 _a54209
035 _a58360
040 _cCHAP
082 _a001.6424
_bR6
100 0 0 _aRoth, John Paul.
_9100262
245 _aComputer logic, testing and verification
260 _aPotomac, Md. :
_bComputer Science,
_c1980
300 _a176 p.
490 _aDigital system desing series
590 _aBATCH-UPD
_b10
_c20130109
_lUCH01
_h2335
590 _aBATCH-UPD
_b10
_c20130110
_lUCH01
_h0535
590 _aBATCH-UPD
_b10
_c20130409
_lUCH01
_h1902
590 _aBATCH-UPD
_b10
_c20130914
_lUCH01
_h0940
590 _aCONVERSION
_b10
_c20130109
_lUCH01
_h1329
650 1 4 _aCircuitos lógicos.
_923359
650 1 4 _aDiseño lógico.
_932733
830 0 _aDigital system desing series
_932572
901 _aBK
942 _cLIBRO
949 _a001.6424 R6
_bBC
_cLIBRO
_d33724000292926
_eLIBRO
_h55683
_i58360
_si
999 _c53237
_d53237